Senior SoC Design Verification Engineer - Remote

Overview

The Senior SoC Design Verification Engineer will be responsible for developing and executing verification plans for digital designs, ensuring that all specifications are met through rigorous testing and debugging.

In Short

• Develop and execute verification plans using SystemVerilog and UVM.
• Create and maintain testbenches, test cases, and test vectors.
• Contribute to novel methodologies and verification techniques.
• Run simulations to verify designs against specifications.
• Implement coverage tracking and metrics.
• Document verification strategies comprehensively.
• Work collaboratively with the RTL team to debug issues.
• Must be a US Citizen.
• Full-time position with benefits and bonuses.
• Remote work available from any US location.

Requirements

• BSEE/MSEE with 5-15 years of SoC verification experience.
• Experience in Gate Level Simulation setup and analysis.
• Knowledge of digital design concepts and ASIC development flow.
• Proficient in writing and debugging RTL using SystemVerilog.
• Programming skills in C, C++, Python, or Perl.
• Strong communication and collaboration abilities.
• Familiarity with Synopsys verification tools.
• Able to manage multiple complex tasks in a fast-paced environment.

Benefits

• Competitive salary with bonus opportunities.
• Comprehensive benefits package including 401k and stock options.
• Flexible remote working options.
• Opportunity to work on cutting-edge technologies.
• Collaborative and innovative work environment.