Senior ASIC Package Design Engineer - Remote

Overview

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a groundbreaking Series C space startup, we’d love for you to apply.

In Short

• Implement advanced ASIC package architecture focusing on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions.
• Support end-to-end package strategy for high-performance mixed-signal and digital SoCs.
• Collaborate with internal teams for package design and ensure first-pass success for complex ASICs.
• Define ASIC package architecture, including substrate stack-up and power delivery.
• Lead package-level trade studies across cost, performance, and reliability.
• Establish package design standards and best practices.
• Drive detailed design of FC-BGA packages for high-pin-count ASICs.
• Partner with silicon and systems teams to optimize die floorplans.
• Support package-level SI/PI strategy and drive material selection.
• Lead thermal architecture at the package level.

Requirements

• Bachelor’s degree in Packaging, Mechanical, or Electrical Engineering.
• 5+ years of experience in ASIC package design with expertise in FC-BGA.
• Proven experience delivering high-performance ASIC packages into production.
• Strong understanding of substrate technologies and thermal management.
• Fluent in SI/PI and EM simulation tools like SIWave and HFSS.
• Experience working with OSATs and substrate vendors.
• Knowledge of packaging qualification and test methodologies.

Benefits

• Base salary range is $180,000 – $260,000 + equity.
• Comprehensive benefits package including medical/dental/vision coverage.
• Paid time off and paid parental leave.
• Many other perks offered.