Principal ASIC Physical Design Engineer - Remote

Overview

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors, we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

In Short

• Lead the implementation of complex SoCs for satellite and space systems.
• Own the full physical design flow from RTL handoff to GDSII.
• Collaborate with architecture, RTL design, DFT, and packaging teams.
• Manage external physical design partners and drive tool decisions.
• Ensure first-pass silicon success in advanced FinFET technologies.
• Contribute to developing cutting-edge SoCs for space applications.
• Support chip bring-up and debug through collaboration.
• Optimize performance, power, and area (PPA) methodologies.
• Act as a technical leader and mentor for the team.
• Work in a fast-paced, collaborative environment.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• 10+ years of experience in ASIC physical design.
• Expertise in RTL-to-GDSII flows using industry tools.
• Experience with timing closure and IR drop analysis.
• Understanding of physical design constraints for SoCs.
• Experience with advanced FinFET process nodes.
• Prior experience managing offshore PD teams.
• Strong communication and leadership skills.
• Ability to mentor others in the team.
• Familiarity with DFT integration and power domain implementation.

Benefits

• Base salary range of $190,000 – $280,000 + equity.
• Comprehensive benefits package including medical/dental/vision coverage.
• Paid time off and parental leave.
• Opportunities for professional growth and development.
• A collaborative and innovative work environment.