SoC Design Verification Lead - Remote

Overview

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

In Short

• Lead and manage a team of Digital Verification Engineers responsible for verifying Tenstorrent's SoC logic and digital IP.
• Participate in & oversee the creation of test plans, development of testbenches, monitors, checkers, tests, models, assertions, methodologies, integration of VIP, etc.
• Ensure the application of advanced verification methodologies such as UVM, FPGA prototyping, and emulation.
• Champion best practices for low power verification and coverage-driven constrained random verification.
• Monitor the verification process, including functional, performance and power verification, and drive the team toward successful tape-out.
• Conduct regular reviews of verification metrics and results, ensuring that verification convergence meets project goals.
• Provide & explain verification execution metrics and how they relate to program status.
• Collaborate with cross-functional teams such as architects, designers, and post-silicon validation teams.
• Provide mentorship, technical guidance, and performance feedback to your team.
• Handle resource planning, project prioritization, and ensure the team remains aligned with organizational goals.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of experience in digital hardware verification, with at least 4 years in a management or leadership role.
• Proven experience with SoC-level verification, including SystemVerilog, UVM, and constrained random verification techniques.
• Strong experience in low power verification methodologies and power/performance validation.
• Strong & demonstrable proficiency in SV-UVM, C/C++, python, perl, TCL, test bench code.
• Expertise in FPGA prototyping and emulation techniques.
• A strong understanding of computer architecture and machine learning frameworks.
• Excellent communication and interpersonal skills with a focus on team-building.
• Prior experience in driving project verification from concept to tape-out.

Benefits

• Highly competitive compensation package and benefits.
• Equal opportunity employer.