Senior Physical Design Engineer - Remote

Overview

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

In Short

• Hands-on experience with synthesis and place and route using industry standard tools for next generation high speed CPU core design.
• Perform all aspects of design flow from feasibility analysis, logic synthesis, place and route, FEV, power, timing, quality checks, and design closure.
• Develop and recommend better design method practices to enable better synthesis convergence.
• Plan out resources, schedule, project PPA.
• Willingness to work with others in a highly complex decision space.
• Skills at developing an implementation plan monitoring key indicators and communicating resource needs and scoping risk to deliver value on schedule.
• Excellent verbal and written communication and collaboration skills.

Requirements

• Bachelors in Computer Engineering or Electrical Engineering with 10+ years of relevant work experience or M.S. in Computer Engineering or Electrical Engineering (or higher degree) with 10+ years of relevant work experience.
• Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure.
• PV convergence (including static timing and power analysis).
• Chip physical design verification including formal equivalence, timing, electrical rules, DRC/LVS, Noise and electro-migration checks.
• Hands-on experience with synthesis, block and chip level implementation with industry standard PnR flows and tools.
• Strong experience in SOC/ASIC/GPU/CPU design flows on taped out designs, expertise in timing closure at block/chip levels and ECO flows.
• Scripting in an interpreted language (Python, TCL).

Benefits

• Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets.
• Highly competitive compensation package and benefits.
• Equal opportunity employer.