Senior Engineer - Silicon Physical Design - Remote

Overview

As a Senior Silicon Physical Design Engineer at Axelera AI, you will play a crucial role in developing cutting-edge multi-core in-memory compute SoCs.

In Short

• Perform synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification.
• Ensure timing closure, constraint generation, and optimization.
• Execute clock tree synthesis (CTS) and clock-building techniques.
• Integrate IPs including memories and processors.
• Utilize EDA tools such as Primetime, StarRC, Genus, and Innovus.
• Develop automation scripts in Python, Tcl, or Perl.
• Debug and solve technical challenges related to physical design.
• Collaborate with architecture, RTL, and verification teams.

Requirements

• 10+ years of experience in Physical Design (RTL to GDS).
• Strong communication and teamwork skills.
• Expertise in synthesis, timing analysis, and timing closure.
• Hands-on experience with leading EDA tools.
• Proficiency in clocking techniques and CTS.
• Experience in IP integration across various domains.
• Strong scripting skills (Python, Tcl, or Perl).
• Proven problem-solving and debugging capabilities.
• Fluent in English (spoken and written).

Benefits

• Attractive compensation package including a pension plan.
• Extensive employee insurances.
• Option to get company shares.
• Dynamic and fast-growing international organization.
• Open culture that supports creativity and continual innovation.
• Collaborative ownership and freedom with responsibility.